Jianping Zeng

Ph.D. in Computer Science

Computer Architecture Researcher at Samsung Semiconductor Inc.
3655 N First St, San Jose, CA 95134, USA
Email: zeng207 (at) purdue (dot) edu
Email: jpzeng92 (at) gmail (dot) com

Google Scholar DBLP

Biography

I am a computer architecture researcher in the Samsung Memory Solutions Lab (MSL) with a Ph.D. degree in Computer Science from Purdue University where I was fortunately advised by Prof. Changhee Jung. In the meanwhile, I also closely work with Prof. Dongyoon Lee at Stony Brook University, Prof. Trevor E. Carlson at National University of Singapore, and Prof. Jongouk Choi at University of Central Florida. Prior to joining Purdue University, I worked as a compiler engineer with focuses on optimizing the middle-end and backend of GCC (GNU Compiler Collection) for CSKY architecture (an embedded architecture widely used in network switch, printer, etc) of Alibaba T-Head Semiconductor.

Research

As a computer architecture researcher in the Samsung MSL, I work on hardware/software co-design for high-performance memory products, such as next generation high bandwidth memory (HBM), CXL (Computing eXpress Link)-based memory, and their applications for GPUs and artificial intelligence. While I was a Ph.D. student at Purdue University, I designed reliable and performant computing systems, ranging from embedded systems to server-class systems, against soft errors and crash consistency issues resulting from power failures. To achieve that, I usually co-design compilers and architectures to maintain minimal hardware complexity while achieving high performance. My research works are typically published at top-tier conferences in the fields of computer architecture, high-performance computing (HPC), and programming languages, e.g., ISCA, MICRO, ICS, HPDC, and PLDI.

5 first-author publications in top computer architecture/HPC conferences: (1) MICRO'21x2, (2) MICRO'23, (3) ISCA'24, (4) ICS'24.
6 second-author publications in top computer system conferences: (1) PLDI'20, (2) HPDC'22, (3) ISCA'23, (4) MICROx2, (5) RTSS'23.

News

Conference Paper
    [TOP-TIER] tag is used to mark the paper that appears in one of the top CS conferences selected by csrankings.org.

  • LightWSP: Whole-System Persistence on the Cheap [PDF]
    Yuchen Zhou, Jianping Zeng, Changhee Jung
    [TOP-TIER] 57th International IEEE/ACM Symposium on Microarchitecture (MICRO), Austin, Texas, November 2024.
    Acceptance rate: 22.7% (113 out of 497 submissions)

  • Compiler and Architecture Co-design for Reliable Computing [PDF]
    Jianping Zeng
    Doctoral Dissertation, Department of Computer Science, Purdue University, August 2024.

  • Compiler-Directed Whole-System Persistence [PDF] [PPT]
    Jianping Zeng, Tong Zhang, Changhee Jung
    [TOP-TIER] 51th International ACM/IEEE Symposium on Computer Architecture (ISCA), Buenos Aires, Argentina, June 2024.
    Acceptance rate: 19.6% (83 out of 423 submissions)

  • Soft Error Resilience at Near-Zero Cost [PDF] [PPT]
    Jianping Zeng, Shao-Yu Huang, Jiuyang Liu, Changhee Jung
    [TOP-TIER] 38th ACM International Conference on Supercomputing (ICS), Kyoto, Japan, June 2024.

  • RTailor: Parameterizing Soft Error Resilience for Mixed-Criticality Real-Time Systems [PDF]
    Shao-Yu Huang, Jianping Zeng, Xuanliang Deng, Sen Wang, Ashrarul Haq Sifat, Burhanuddin Bharmal, Jia-Bin Huang, Ryan Williams, Haibo Zeng and Changhee Jung
    [TOP-TIER] 44th International IEEE Real-Time Systems Symposium (RTSS), Taipei, December 2023.

  • Persistent Processor Architecture [PDF] [PPT]
    Jianping Zeng, Jungi Jeong, Changhee Jung
    [TOP-TIER] 56th International IEEE/ACM Symposium on Microarchitecture (MICRO), Toronto, Canada, October 2023.
    Acceptance rate: 23.8% (101 out of 404 submissions)
    Nominated as Memorable Paper Finalist in NVMW'24

  • SweepCache: Intermittence-Aware Cache on the Cheap [PDF] [PPT]
    Yuchen Zhou, Jianping Zeng, Jungi Jeong, Jongouk Choi, Changhee Jung
    [TOP-TIER] 56th International IEEE/ACM Symposium on Microarchitecture (MICRO), Toronto, Canada, October 2023.
    Acceptance rate: 23.8% (101 out of 404 submissions)

  • Write-Light Cache for Energy Harvesting Systems [PDF]
    Jongouk Choi, Jianping Zeng, Dongyoon Lee, Changwoo Min, Changhee Jung
    [TOP-TIER] 50th International ACM/IEEE Symposium on Computer Architecture (ISCA), Orlando, USA, June 2023.
    Acceptance rate: 21% (79 out of 373 submissions)

  • Capri: Compiler and Architecture Support for Whole-System Persistence [PDF] [PPT]
    Jungi Jeong, Jianping Zeng, Changhee Jung
    [TOP-TIER] 31th International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC), Minneapolis, USA, June 2022.
    Acceptance rate: 19% (21 out of 108 submissions)

  • ReplayCache: Enabling Volatile Caches for Energy Harvesting Systems [PDF] [PPT]
    Jianping Zeng, Jongouk Choi, Xinwei Fu, Ajay P. Shreepathi, Dongyoon Lee, Changwoo Min, and Changhee Jung
    [TOP-TIER] 54th IEEE/ACM International Symposium on Microarchitecture (MICRO), Online, October 2021.
    Acceptance rate: 21.8% (94 out of 430 submissions)

  • Turnpike: Lightweight Soft Error Resilience for In-Order Cores [PDF] [PPT]
    Jianping Zeng, Hongjune Kim, Jaejin Lee, and Changhee Jung
    [TOP-TIER] 54th IEEE/ACM International Symposium on Microarchitecture (MICRO), Online, October 2021.
    Acceptance rate: 21.8% (94 out of 430 submissions)

  • Compiler-Directed Soft Error Resilience for Lightweight GPU Register File Protection [PDF]
    Hongjune Kim, Jianping Zeng, Qingrui Liu, Mohammad Abdel-Majeed, Jaejin Lee, and Changhee Jung
    [TOP-TIER] 41th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Online, June 2020.
    Acceptance rate: 22.5% (77 out of 341 submissions)
Workshop Paper
  • Persistent Processor Architecture
    Jianping Zeng, Jungi Jeong, Changhee Jung
    15th Non-Volatile Memories Workshop (NVMW), San Diego, USA, March 2024.

  • SweepCache: Intermittence-Aware Cache on the Cheap
    Yuchen Zhou, Jianping Zeng, Jungi Jeong, Jongouk Choi, Changhee Jung
    15th Non-Volatile Memories Workshop (NVMW), San Diego, USA, March 2024.

  • Write-Light Cache for Energy Harvesting Systems
    Jongouk Choi, Jianping Zeng, Dongyoon Lee, Changwoo Min, Changhee Jung
    15th Non-Volatile Memories Workshop (NVMW), San Diego, USA, March 2024.

  • Capri: Compiler and Architecture Support for Whole-System Persistence [PDF]
    Jungi Jeong, Jianping Zeng, Changhee Jung
    14th Non-Volatile Memories Workshop (NVMW), San Diego, USA, March 2023.

  • ReplayCache: Enabling Volatile Caches for Energy Harvesting Systems [PDF]
    Jianping Zeng, Jongouk Choi, Xinwei Fu, Ajay P. Shreepathi, Dongyoon Lee, Changwoo Min, and Changhee Jung
    13th Non-Volatile Memories Workshop (NVMW), San Diego, USA, May 2022.

Teaching Experience
Mentees
  • Shao-Yu Huang, PhD student since Spring 2021 at Purdue University
  • Yuchen Zhou, PhD student since Fall 2021 at Purdue University
  • Mingqin Han, PhD student since Fall 2022 at Purdue University
  • Gan Fang, PhD student since Spring 2023 at Purdue University
  • Eunice Lee, PhD student since Fall 2023 at Purdue University
  • Samuel Youssef, PhD student since Spring 2024 at Purdue University
Honor
  • Memorable Paper Finalist in NVMW 2024
  • Merit Recognition Award from the CS department at Purdue (top 10% among faculty, staff, post-docs, and grads)
  • Travel Award: NVMW (2022, 2023), MICRO (2023), ISCA (2024), ICS (2024)
Service
  • Organization Committee
      Languages, Compilers, Tools and Theory of Embedded Systems (LCTES): 2020 (Web Chair)
  • Conference Reviewer
      Principles and Practice of Parallel Programming (PPoPP): 2025 (PC)
      International Symposium on Computer Architecture (ISCA): 2025 (LPC)
  • Journal Reviewer
      ACM Transactions on Architecture and Code Optimization (TACO): 2023, 2024
      ACM Transactions on Embedded Computing Systems (TECS): 2024
      IEEE Computer Architecture Letter (CAL): 2022, 2024
      IEEE Transactions on Computers (TC): 2024
  • Sub-reviewer
      ACM SIGPLAN Symposium Principles and Practice of Parallel Programming (PPoPP): 2020-2023
      Architectural Support for Programming Languages and Operating Systems (ASPLOS): 2020, 2022-2023
      International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES): 2020, 2023, 2024
      International Conference on Compiler Construction (CC): 2020
      International Symposium on Code Generation and Optimization (CGO): 2020, 2022
      International Symposium on Computer Architecture (ISCA): 2023, 2024
      International Symposium on High-Performance Computer Architecture (HPCA): 2025
      International Symposium on High-Performance Parallel and Distributed Computing (HPDC): 2020, 2022, 2024
      International Symposium on Microarchitecture (MICRO): 2020, 2022, 2024
      USENIX Annual Technical Conference (ATC): 2020
Working Experience
  • Computer Architecture Researcher: August 2024 - Present, Samsung Memory Solutions Lab (MSL).
  • Research Intern: May 2023 - August 2023, Samsung Memory Solutions Lab (MSL) managed by Dr. Yang Seok Ki.
    I interned at Samsung MSL to design a more energy-efficiency ECC DRAM while maintaining its reliability.
  • Research Intern: May 2022 - August 2022, Alibaba DAMO Academy, Computing Technology Lab directed by Prof. Yuan Xie.
    I worked on optimizing the ARM memory fence instructions, which is particular of importance for the server cores scaling up to 256 cores. This is because ARM processor is now prevalent in server fleets due to its energy-efficiency and low license cost. However, the memory fences, highly affecting the performance of multi-threaded applications, on ARM cores are not optimized in contemporary ARM server processors.
  • Senior Compiler Engineer: Dec 2017 - July 2018, Alibaba T-Head Semiconductor.
    After obtaining my Master degree from HUST, I worked at Alibaba T-Head as a senior compiler engineer with the focus on analyzing and uncovering the performance bottleneck of GCC for CSKY architecture in terms of run-time performance and code size. What I did is fixing a series of performance bugs of GCC for CSKY in GCC's local register allocation and its naive instruction selector though there is a post-isel phase to combine multiple simple instructions into a more sophisticated form.
  • Senior Software Engineer: June 2017 - Dec 2017, Alibaba Taobao BU.
    I worked there to design a static analyzer for C/C++/Objective-C/Objective-C++ based on Clang, which is widely used for statically validating the correctness and ensuring the robustness of Taobao App (the most popular online shopping application in China).
  • Software Engineer Intern: June 2016 - August 2016, Alibaba Group.
    During the summer 2016, I interned at Alibaba Group to develop a prototype (so-called StaticJS) that optimizes the performance of Google V8 JavaScript Virtual Machine. That is, StaticJS annotates program variables with type information and then passes the type information to the middle-end optimizations and code generation. As such, StaticJS avoids the drawbacks of dynamic typing in JavaScript to some extent and achieves higher performance transparently.