Jianping Zeng


Incoming tenure-track Assistant Professor

School of Computing and Augmented Intelligence (SCAI)

Arizona State University (ASU)

Email: jpzeng92 (at) gmail (dot) com

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Biography

I am a computer architecture researcher in the Samsung Memory Solutions Lab (MSL) with a Ph.D. degree in Computer Science from Purdue University where I was fortunately advised by Prof. Changhee Jung. Prior to joining Purdue University, I worked as a compiler engineer with focuses on optimizing the middle-end and backend of GCC (GNU Compiler Collection) for CSKY architecture (an embedded architecture widely used in network switch, printer, etc) of Alibaba T-Head Semiconductor.



I will be joining the School of Computing and Augmented Intelligence (SCAI) at Arizona State University (ASU) as a tenure-track assistant professor in Fall 2025. I am looking for self-motivated PhD students to start in Fall 2025 or Spring/Fall 2026. Potential research projects include software/hardware co-design for performance and reliability issues of CPUs/GPUs/Memory systems. Please send me an email with your CV, transcript, and English test report, if you are interested in working with me.


Research

My research interest lies in compiler and computer architecture. Specifically, I aim to co-design compiler and computer architecture to address performance and reliability issues of CPUs/GPUs/memory systems for modern complex workloads. As a computer architecture researcher in the Samsung MSL, I work on hardware/software co-design for high-performance memory products, e.g., CXL (Computing eXpress Link)-based memory and processing-in-memory (PIM). While I was a Ph.D. student at Purdue University, I designed reliable and performant computing systems, ranging from embedded systems to server-class systems, against soft errors and crash consistency issues resulting from power failures. To achieve that, I usually co-design compilers and architectures to maintain minimal hardware complexity while achieving high performance. My research works are typically published at top-tier conferences in the fields of computer architecture, high-performance computing (HPC), and programming languages, e.g., ISCA, MICRO, ICS, HPDC, and PLDI.

5 first-author publications in top computer architecture/HPC conferences: (1) MICRO'21x2, (2) MICRO'23, (3) ISCA'24, (4) ICS'24.
7 second-author publications in top computer system conferences: (1) PLDI'20, (2) HPDC'22, (3) ISCAx2, (4) MICROx2, (5) RTSS'23.

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